With the development of the electronics industry including, for example, mobile communications and computers, the demand for semiconductor devices having characteristics such as rapid read/write speed, nonvolatility, and/or lower operating voltage has increased. However, current memory devices, such as static random access memory (SRAM), dynamic random access memory (DRAM), and a flash memory, may not satisfy one or more of these requirements.
For example, as a unit cell of a DRAM typically includes a single capacitor and a single transistor for controlling the capacitor, a unit cell of a DRAM may require a larger area than a unit cell of a NAND flash memory. Moreover, a DRAM, which stores data in the capacitor, is a volatile memory device that needs a refresh operation. Further, an SRAM operates at high speed, but it is also a volatile memory device. Additionally, a unit cell of an SRAM may include 6 transistors, so a unit cell or an SRAM may also occupy a large area. Further, although flash memory is a nonvolatile memory device and (especially, for example, the NAND flash memory) has the highest integration density of presently discussed memory devices, flash memory operates at lower speed.
For at least the above-mentioned reasons, there have been extensive studies on new memory devices, which are capable of faster read/write operations, exhibit nonvolatility, need no refresh operations, and operate at lower voltage. A phase random access memory (PRAM), a magnetic RAM (MRAM) or a resistive RAM (ReRAM) are the next generation memory devices, which are candidates to satisfy the aforementioned technical requirements. For all that, a technology capable of realizing a memory capacity required from the market should be prepared so as to send these next generation memory devices into mass production.